The present invention relates to an analog-to-digital conversion (ADC) scheme, and more particularly to a delta-sigma analog-to-digital conversion apparatus, and a method thereof.
A conventional ADC device with continuous-time delta sigma modulation (CTDSM) usually includes a quantizer. The quantizer is usually implemented using a flash analog-to-digital converter, i.e. an analog-to-digital converter having high speed signal processing. It is required to use more comparators to implement the flash analog-to-digital converter if the flash analog-to-digital converter includes multi-bit outputs. A significantly large number of comparators will introduce more costs to the conventional ADC device. In addition, a digital-to-analog converter conventionally used for directly feeding back a feedback signal from the output terminal of the quantizer into the input terminal of the quantizer may not achieve system stability and has large bandwidth/high operating speed limitations. Both these issues cause serious problems.